X-Message-Number: 26102
From: 
Date: Thu, 28 Apr 2005 07:10:17 EDT
Subject: Re: CryoNet #26090 To T. Donaldson

You said:
> 
> A discussion of just how your system will simulate a brain, too, would
> be useful here. I have pointed out that unlike what people thought only
> 15 years ago, our brains are biologically active, growing new neurons
> and new connections between old neurons. How do you propose to implement
> this growth feature? This question becomes particularly important 
> because such growth apparently plays a role in learning and the formation
> of new memories.

I have mostly analysed the mathematical tools we can use to model the neuron 
up to now. My feeling is that the most important elements are there, I think 
most memory for example comes from the dendrite spine density on the dendrite 
tree. They give a weight to the synaptic spine well beyond what is possible 
with presynaptic potential action on vesicle release.

I'll post in some days the 3.iii.0 message about  how neurons can be linked 
in a neural network, there is a small preview:

When a neuron, say X1, produces an action potential, it broadcast its address 
to a buffer. This one has a table telling what are the destination for X1 
message, For example Y1, Z15, and so on. Y1 could be on the same chip but 

simulated 9 simulation blocks later, so the X1 signal will be loaded in this 
table. 

Z15 could be 18 simulation block later on another chip, so the X1 address would
be sent to the buffer managing Z15. At each start of a simulation block, the 
table with all the entries addresses is sent to the FPGA so that the neurons 
get their input.

My estimate is that current FPGA can simulate someting between 100 and 1,000 
neurons at the same time and can use time sharing to look at 150 successive 
blocks. There could be so 150,000 neurons on a chip. Buffers chip would be 
linked in a network similar to Internet. So the brain could grow up to the 
addressing limit of the IP system.

Yvan Bozzonetti.


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